DSC POWER 864 - REV2 Dokumentacja Strona 126

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PIC24F16KA102 FAMILY
DS39927B-page 124 Preliminary © 2009 Microchip Technology Inc.
FIGURE 15-1: OUTPUT COMPARE MODULE BLOCK DIAGRAM
Comparator
Output
Logic
QS
R
OCM<2:0>
Output Enable
OC1
(1)
Set Flag bit
OC1IF
(1)
OC1RS
(1)
Mode Select
3
Note 1: Where ‘x’ is depicted, reference is made to the registers associated with the respective Output Compare Channel 1.
2: OCFA pin controls OC1 channel.
3: Each output compare channel can use one of two selectable time bases. Refer to the device data sheet for the
time bases associated with the module.
OCTSEL
0
1
1616
OCFA
(2)
TMR Register Inputs
from Time Bases
(3)
Period Match Signals
from Time Bases
(3)
0
1
OC1R
(1)
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